1. Field of the Invention
This invention relates generally to the field of microprocessors and, more particularly, to arithmetic units within microprocessors.
2. Description of the Related Art
Microprocessors are typically designed with a number of "execution units" that are each optimized to perform a particular set of functions or instructions. For example, one or more execution units within a microprocessor may be optimized to perform memory accesses, i.e., load and store operations. Other execution units may be optimized to perform general arithmetic and logic functions, e.g., shifts and comparisons. Many microprocessors also have specialized execution units configured to perform more complex arithmetic operations such as multiplication and reciprocal operations. These specialized execution units typically comprise hardware that is optimized to perform particular arithmetic functions. In the case of multiplication, the optimized hardware is typically referred to as a "multiplier."
In older microprocessors, multipliers were implemented using designs that conserved die space at the expense of arithmetic performance. Until recently, this was not a major problem because most applications, i.e., non-scientific applications such as word processors, did not frequently generate multiplication instructions. However, recent advances in computer technology and software are placing greater emphasis upon multiplier performance. For example, three dimensional computer graphics, rendering, and multimedia applications all rely heavily upon a microprocessor's arithmetic capabilities, particularly multiplication and multiplication-related operations. As a result, in recent years microprocessor designers have favored performance-oriented designs that use more die space. Unfortunately, the increased die space needed for these high performance multipliers reduces the space available for other execution units within the microprocessor. Thus, a mechanism for increasing multiplier performance while conserving die space in needed.
The die space used by multipliers is of particular importance to microprocessor designers because many microprocessors, e.g., those configured to execute MMX.TM. (multimedia extension) or 3D graphics instructions, may use more than one multiplier. 3DX instructions are often implemented as "vectored" instructions. Vectored instructions have operands that are partitioned into separate sections, each of which is independently operated upon. For example, a vectored multiply instruction may include a pair of 32-bit operands, each of which is partitioned into four 8-bit sections. Upon execution of a vectored multiply instruction, corresponding 8-bit sections of each operand are independently and concurrently multiplied. FIG. 1 illustrates the differences between a scalar (i.e., non-vectored) multiplication and a vector multiplication. To quickly execute vectored multiply instructions, many microprocessors use a number of multipliers in parallel.
Another factor that may affect the number of multipliers used within a microprocessor is the microprocessor's ability to operate upon multiple data types. Most microprocessors must support multiple data types. For example, x86 compatible microprocessors must execute certain instructions that are defined to operate upon an integer data type along with instructions that are defined to operate upon a floating point data type. Floating point data can represent numbers within a much larger range than can integer numbers. For example, a 32-bit signed integer can represent the integers between -2.sup.31 and 2.sup.31 -1 (using two's complement format). In contrast, a 32-bit ("single precision") normalized floating point number as defined by Institute of Electrical and Electronic Engineers (IEEE) standard 754 has a range from 2.sup.-126 to (2.sup.127).times.(2-2.sup.-23) in both positive and negative numbers. While both integer and floating point data types are capable of representing positive and negative values, integers are considered to be "signed" for multiplication purposes, while floating point numbers are considered to be "unsigned." Integers are considered to be signed because they are stored in two's complement representation.
Turning now to FIG. 2A, an exemplary format for an 8-bit integer 100 is shown. As illustrated in the figure, negative integers are represented using the two's complement format 104. To negate a positive integer, all bits are inverted to obtain the one's complement format 102. A constant of one is then added to the least significant bit (LSB).
Turning now to FIG. 2B, an exemplary format for a 32-bit (single precision) floating point number is shown. A floating point number is represented by a significant, an exponent and a sign bit. The base for the floating point number is raised to the power of the exponent and multiplied by the significant to arrive at the number represented. In microprocessors, base 2 is typically used. The significant comprises a number of bits used to represent the most significant digits of the number. Typically, the significant comprises one bit to the left of the decimal and the remaining bits to the right of the decimal. In order to save space, the bit to the left of the decimal, known as the integer bit, is not explicitly stored. Instead, it is implied in the format of the number. Additional information regarding floating point numbers and operations performed thereon may be obtained in IEEE standard 754. As illustrated in FIG. 2B, a floating point number's significant is represented as a sign bit and a magnitude. Unlike the integer representation, two's complement format is not typically used in the floating point representation. Instead, sign and magnitude form are used. Thus only the sign bit is changed when converting from a positive value 106 to a negative value 108. For this reason, many microprocessors use two multipliers, i.e., one for signed values (two's complement format) and another for unsigned values (sign and magnitude format). For these reasons, a mechanism for increasing floating point, integer, and vector multiplier performance while conserving die space is needed.